(1) Field of the Invention
The present invention relates to methods used to fabricate semiconductor devices, and more specifically to a method used to prepare a semiconductor surface for growth of a thin silicon dioxide gate insulator layer.
(2) Description of Prior Art
The trend to micro-miniaturization, or the ability to fabricate semiconductor devices featuring sub-micron features, for purposes of improving device performance as well as for decreasing processing costs, have led to the use of ultra-thin gate insulator layers. Silicon dioxide layers as thin as 15 Angstroms, have been used for the gate insulator layer for metal oxide semiconductor field effect transistor (MOSFET) devices. However the process window in terms of oxidation temperature and time, can be limited for the thermal oxidation processes employed to grow the ultra-thin gate insulator layer. To improve quality of the thin silicon dioxide gate insulator layers higher oxidation temperatures are required, however at the expense of decreasing oxidation time to values difficult to control.
This invention will describe a pre-oxidation procedure which will expand the process window for subsequent attainment of thermally grown, ultra-thin silicon dioxide layers, specifically allowing longer oxidation times to be used with higher oxidation temperatures. The use of longer oxidation times increase the process window or control, while the higher oxidation temperature improves the quality of the ultra-thin silicon dioxide layer. This is made possible via implementation of a novel, pre-oxidation anneal treatment, performed at high temperatures, resulting in a cleaner semiconductor surface thus the attainment of a higher quality silicon dioxide layer. In addition the higher temperature pre-oxidation anneal procedure more effectively removes native oxide from the semiconductor surface, where in previous cases the native oxide contributed to the final silicon dioxide thickness thus resulting in shorter oxidation time required to obtain a specific silicon dioxide thickness. The longer oxidation times allow greater process control to be realized. Prior art such as: Yu, in U.S. Pat. No. 6,171,911; Sun et al, in U.S. Pat. No. 6,258,730B1; Wang, in U.S. Pat. No. 6,087,243; Chen et al, in U.S. Pat. No. 6,255,2311B1; and Yu et al, in U.S. Pat. No. 6,204,205B1; describe procedures for pre-treating semiconductor substrates prior to oxidation, procedures for specific oxidation conditions, and procedures for post oxidation anneal treatments. However none of these prior arts describe the novel process sequence used in this present application wherein a high temperature anneal is performed prior to the thermal oxidation procedure used to grow ultra-thin silicon dioxide gate insulator layers, allowing the process window for the oxidation procedure to be increased.
It is an object of this invention to thermally grow an ultra-thin (less than 20 Angstrom), silicon dioxide gate insulator layer, for a MOSFET device.
It is another object of this invention to increase the process window of the thermal oxidation procedure, and to improve gate insulator layer quality, via extending oxidation time and via use of higher oxidation temperatures.
It is still another object of this invention to perform a high temperature anneal procedure in an inert ambient after a series of wet clean procedures and prior to growth of the silicon dioxide gate insulator layer, to extend oxidation time and to improve the quality of the thermally grown silicon dioxide layer.
In accordance with the present invention a method of forming an ultra-thin silicon dioxide gate insulator layer featuring a high temperature anneal procedure, performed in an inert ambient prior to a high temperature thermal oxidation procedure, allowing the process window for the thermal oxidation procedure to be increased and resulting in improved quality of the thermally grown silicon dioxide layer, is described. After a series of wet clean procedures featuring processes used to remove organic materials and metallic contaminants from the surface of a semiconductor surface, a high temperature anneal procedure is performed in an inert ambient removing additional contaminants not removable via the previous wet clean procedures, while also removing native oxide formed during the previous wet clean procedures. The removal of the additional contaminants and native oxide allow the desired gate insulator thickness be achieved via use of longer thermal oxidation times, thus improving the process window or process control for the thermal oxidation procedure. In addition the removal of contaminants and native oxide via use of the high temperature anneal procedure result in a cleaner semiconductor surface, allowing the desired thickness of the ultra-thin silicon dioxide layers to be obtained using higher oxidation temperatures, thus resulting in higher quality silicon dioxide gate insulator layers when compared to counterpart silicon dioxide layers thermally grown using lower oxidation temperatures.